Qibec CPU: RAM-/ROM-implementation and MMIO-interface

Описание к видео Qibec CPU: RAM-/ROM-implementation and MMIO-interface

This video shows how the RAM and ROM used by the CPU are implemented in software, on a host-PC.

The CPU is in fact using a serial RAM & ROM without even knowing it, where a bridge-module communicates between the CPU's address- and data-bus on one side, and the host-PC on the other side.

Using this scheme, it becomes easy to implement memory-mapped and virtual devices, such as a display- and pushbutton-interface.

For more info, visit http://Qibec.org

Комментарии

Информация по комментариям в разработке

Похожие видео